When a new product is being developed for production, electromagnetic compliance (EMC) failures can pose a significant risk to your project schedule and budget. Therefore, it is important to ensure your product has been designed robustly to avoid these costly failures. In the past, mitigating electromagnetic interference (EMI) relied on internal best-practices developed over years of fixing regulatory failures. Oftentimes companies relied on outside organizations with greater EMC knowledge to assist in their product designs. Fortunately, Ansys has developed the necessary tools to work alongside the designer and focus on minimizing the risk of EMC failures.
EMI Scanner
Like a design rule check within PCB layout tools, the EMI Scanner evaluates your design for EMC rule violations. The EMI Scanner is housed within SIwave and can be accessed with an Ansys Electronics Enterprise license. Several EMC rule profiles come included within the tool and the user can fully customize the EMC rules specific to their application. Once EMC rules have been assigned, the EMI Scanner will evaluate the PCB and output all identified rule violations. Each violation indicates the nets involved, layers involved, the type of EMC violation, and the X-Y location on the PCB (Fig. 1). Violations are also ranked by severity to assist in prioritizing mitigation methods. When selecting a violation, the relevant region on the PCB will be highlighted in red for easy identification (Fig. 2). The violation report can also be exported outside of SIwave for reference during PCB design revisions and shared with the greater team. When the EMI Scanner is used during the development process, many costly EMI issues can be removed well before PCBs are fabricated.
Figure 1: EMI Scanner Violations List
Figure 2: Highlighted EMI Violation
Induced Voltages & Resonant Modes
After reviewing the violations output by the EMI Scanner, one may want to take a deeper look into specific nets on their design. SIwave’s induced voltage and resonant mode analysis provides detailed information on traces and pours to assist in evaluating their EMI impacts.
Induced voltage analysis simulates an incoming plane wave and calculates the voltage fluctuations on specified nets over a given frequency range (Fig. 3). The greater the induced voltage, the greater potential for that net to radiate EMI at that frequency. It is important for the designer to consider the frequency harmonics associated with clocks/signals when evaluating induced voltages on nets. If a net has high induced voltage for a frequency that aligns with the signal/harmonic on that net, EMI mitigations should be applied. Mitigation methods include shielding the trace, moving the trace to an internal PCB layer, adding a decoupling capacitor, adding a series filter (ferrite bead or common mode choke), or some combination of the above.
Figure 3: Induced Voltages Simulation
Figure 4: Resonant Mode Analysis
Ansys’ EMI simulation capabilities are an absolute game changer to the traditional PCB development process. From reducing the number of board spins and schedule risk, the EMI tools can easily integrate alongside the existing design process to ensure product success. If you have any additional questions on how to fully leverage these tools, please reach out to your Rand Simulation Account Manager for more information.
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